GF Micro – Leading chip design and development company for ASICS and custom ICs
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GF Micro – Leading chip design and development company for ASICS and custom ICs
PLANNING
PLANNING

PLANNING

Reflecting this approach is our ability to offer much more than basic silicon design. To help achieve a finished and fully working chip we can also incorporate detailed implementation plans. These allow our customers to realise a complete chip solution based on selected packaging technologies and test methodologies.

During the feasibility and design phases we can develop a standard or customised package for customers. Allied to this we produce agreed test and bring-up plans; this allows customers to utilise chip designs in final applications for demonstration purposes, and also enables them to undertake further evaluation, highlighting development still needed.

This whole process, managed by us, comes as a result of our approach to working with customers in the most collaborative way possible.

PACKAGING

PACKAGING

Our customers are always looking for innovative packaging solutions. Twenty-five years of chip design projects has seen us develop experience of a wide range of package technologies. In addition to supporting standard package types we also offer a number of development packages for first silicon evaluation.

We can offer:

• BGA packages

• QFN/MLF packages

• Wafer Level Chip Scale Packages (WLCSP)

• Multi-Chip-Modules (MCM)

• System-In-Package (SiP)

• Chip on Flex (COF)

• Gold Bumping

Complementing this ability we also provide additional layout and interconnect solutions to optimise pads and pins in more complex package options.

TEST DEVELOPMENT

TEST DEVELOPMENT

To help customers achieve a full silicon solution that they can use for demonstration we offer various levels of test development. For basic implementation we provide a bring up service which gives customers a device that is fully functioning and tested.

As well as being responsible for full development and bring up, our service also includes debug, verification and simulation.

We also develop fully optimised production assembly and test solutions as part of our Manufacturing solution.

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PLANNING
PACKAGING
TEST DEVELOPMENT

Our Partners

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GFMicro Ltd.
Woodchester Mill, Selsley Rd,
North Woodchester, England, GL5 5NN,
United Kingdom
+44 (0)1453 872922 info@gfmicro.com
Hours
Mon 08:30 - 17:30
Tue 08:30 - 17:30
Wed 08:30 - 17:30
Thu 08:30 - 17:30
Fri 08:30 - 17:30
 
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Woodchester Mill, Selsley Road, North Woodchester, Stroud, Gloucestershire, GL5 5NN
© 2019 GarField Microelectronics Ltd.
Registration Number: 2914133
Registered Office: Wey Court West, Union Road, Farnham, Surrey. GU9 7PT

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